The present invention relates to methods of forming topographical features using segregating polymer mixtures, and more specifically to methods of forming topographical features utilizing lithographically patternable segregated polymers.
In the manufacture of integrated circuits, fabrication of patterns with smaller critical dimensions allows denser circuitry to be created. Self-segregating polymers provide a route to generate polymer features as described in US Patent Publication No. 20090212016 A1 to Cheng et al. and US Patent Publication No. 20090214823 A1, also to Cheng et al. The segregation process generates two or more compositionally distinct polymer domains. The methods have been used to produce wider lines having the same pitch (space shrinkage between lines) or double the number of lines per unit length (pattern doubling) compared to the pattern of features in the pre-patterned structure.
Despite these gains, many useful layouts for integrated circuits require more complicated patterns of features. Methods and materials are sought to extend the use of self-segregating polymers for the preparation of smaller critical dimension features.